Modeling Leakage Current Variations Starting From Threshold Voltage Shift in SiC MOSFETs Submitted to Positive Gate Stress

The mechanisms determining the threshold instability and the leakage current of silicon carbide (SiC) MOSFETs are currently the subject of intense investigations. It is widely accepted that, under positive bias, the gate leakage current is determined by Fowler–Nordheim tunneling, a process that strongly depends on the electric field. However, a clear description of the changes in gate leakage current induced by long-term stress has not been provided so far in the literature. This article aims at filling this gap, by showing the following relevant results: 1) when submitted to constant voltage stress, SiC MOSFETs may show a threshold voltage variation; fitting of the V_{\mathrm {th}} (t) data can provide quantitative information on the amount of positive and negative charge stored in the dielectric; 2) as a function of stress time, the gate leakage current can show a nonmonotonic variation, related to positive/negative charge trapping; 3) such variations are related to a change in the electric field responsible for Fowler–Nordheim tunneling at the SiC/SiO2 interface; and 4) to support these hypotheses, an analytical model has been proposed: the model takes the threshold voltage variation as an input parameter and can accurately predict the variation of gate leakage current as a function of time for the whole duration of the stress. Excellent agreement between modeling results and experimental data is found.