Range Evaluation of Threshold Voltage Instabilities of GaN-on-Si HEMTs with p-GaN Gate

We propose a technique to evaluate the time-dependence of the threshold voltage instabilities in GaN-based normally-off transistors under positive gate bias. More specifically: (i) for the first time we experimentally evaluate the Vth shift in a wide time window (from to 100 s), as a function of temperature. (ii) We study the existence of two dominant trapping processes, having different time-kinetics. (iii) a first process, occurring in the initial leading to a positive threshold voltage shift, and ascribed to the injection of electrons from the 2DEG towards the AlGaN barrier; (iv) a second process, occurring only for V, leading to a negative shift in threshold voltage. This latter process is not thermally activated and strongly dependent on gate leakage.