Trap related instabilities and localized damages induced by reverse bias”

Different parasitic effects of GaN-based High Electron Mobility Transistors can be ascribed to the presence of deep levels, either at the device surface or within the epitaxial substrate. Gate-lag effects, current collapse, kink in the drain current vs. voltage curves have been observed and characterized using various methods. This paper describes a methodology for the characterization of parasitic effects, based on double-pulse measurements of drain current and transconductance and on the evaluation of trap energy levels using photocurrent spectroscopy and Deep Level Transient Spectroscopy (DLTS). Some case histories are presented, showing the effects of the presence of traps on the AlGaN surface and in the GaN buffer; in particular the latter may explain a kink in the room temperature drain current, ID, vs. drain voltage, VDS, characteristics of GaN HEMTs, originated by build-up (at low VDS) and subsequent release (at high VDS) of negative charge, resulting in a shift of pinch-off voltage VP towards more negative voltages, and in a sudden increase in ID.