High electron mobility transistors (HEMTs) with different gate recess depth were fabricated on an Al/sub 0.33/Ga/sub 0.67/N/GaN heterostructure, utilizing low power Cl/sub 2/ reactive ion etching. An increase in extrinsic transconductance and a positive threshold shift were observed with an increase of etching time. The etch depth was measured by atomic force microscopy (AFM) and determined to be nonlinear with etching time. The two terminal gate-drain leakage increased from about 0.005 mA/mm to 0.05 mA/mm. The destructive three-terminal breakdown voltage was about 120 V for all devices, etched and un-etched. Power measurements were performed in class A/B at a frequency of 8 GHz. The output power varied between 2.5 and 4.5 W/mm with the increase of bias voltage from 25 to 50 V. Independently of etch depth, there was no evidence of device failure even for the highest bias. The low increase in leakage, and no change in breakdown voltage support that low power RIE etching is a viable solution for low damage gate recess etch.

Systematic characterization of Cl2 reactive ion etching for gate recessing in AlGaN/GaN HEMTs

BUTTARI, DARIO;CHINI, ALESSANDRO;MENEGHESSO, GAUDENZIO;ZANONI, ENRICO;
2002

Abstract

High electron mobility transistors (HEMTs) with different gate recess depth were fabricated on an Al/sub 0.33/Ga/sub 0.67/N/GaN heterostructure, utilizing low power Cl/sub 2/ reactive ion etching. An increase in extrinsic transconductance and a positive threshold shift were observed with an increase of etching time. The etch depth was measured by atomic force microscopy (AFM) and determined to be nonlinear with etching time. The two terminal gate-drain leakage increased from about 0.005 mA/mm to 0.05 mA/mm. The destructive three-terminal breakdown voltage was about 120 V for all devices, etched and un-etched. Power measurements were performed in class A/B at a frequency of 8 GHz. The output power varied between 2.5 and 4.5 W/mm with the increase of bias voltage from 25 to 50 V. Independently of etch depth, there was no evidence of device failure even for the highest bias. The low increase in leakage, and no change in breakdown voltage support that low power RIE etching is a viable solution for low damage gate recess etch.
2002
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/2521462
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