The asymmetric multiport Y-converter (AY-MPC) offers significant advantages by enabling single-stage power conversion across ports, eliminating bulky intermediate dc-link capacitors and high-frequency transformers, and integrating an additional dc port using only a single inductor and two switches. However, achieving balanced ac grid currents and minimizing voltage ripples at the dc ports remains a major challenge. This letter proposes a control approach to mitigate low-frequency voltage ripples in the AY-MPC without requiring additional circuitry-unlike existing state-of-the-art solutions. By reshaping the inductor currents of the extended module to modulate the instantaneous power exchanged with the dc ports and suppress net power fluctuations, the proposed method ensures balanced ac grid currents and minimized low-frequency voltage ripple at the dc ports, while preserving the native AY-MPC structure. Novel current profiles are introduced and evaluated, demonstrating a substantial reduction in voltage ripple and a corresponding decrease in the required capacitance. The converter's performance is experimentally validated under various operating conditions.

Low-Frequency Voltage-Ripple Minimization of Asymmetric Multiport Y-Converter

Farag Ahmed Yahia;Biadene D.;Caldognetto T.;Magnone P.;Mattavelli P.
2025

Abstract

The asymmetric multiport Y-converter (AY-MPC) offers significant advantages by enabling single-stage power conversion across ports, eliminating bulky intermediate dc-link capacitors and high-frequency transformers, and integrating an additional dc port using only a single inductor and two switches. However, achieving balanced ac grid currents and minimizing voltage ripples at the dc ports remains a major challenge. This letter proposes a control approach to mitigate low-frequency voltage ripples in the AY-MPC without requiring additional circuitry-unlike existing state-of-the-art solutions. By reshaping the inductor currents of the extended module to modulate the instantaneous power exchanged with the dc ports and suppress net power fluctuations, the proposed method ensures balanced ac grid currents and minimized low-frequency voltage ripple at the dc ports, while preserving the native AY-MPC structure. Novel current profiles are introduced and evaluated, demonstrating a substantial reduction in voltage ripple and a corresponding decrease in the required capacitance. The converter's performance is experimentally validated under various operating conditions.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/3558659
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