This article explores the passivity properties of a dc–dc converter's unterminated all-port MIMO admittance matrix, for analyzing and preventing the converter's destabilizing impact in grid-connecting (interlinking) scenarios with an arbitrary, even meshed, termination (grid impedance). In addition to the passivity properties of the converter's unterminated input and output self admittances, the coupling passivity property is examined, which accounts for the possible destabilizing impact of port-coupling. The dependence of these properties on the control loop parameters is exemplified using a current-controlled buck converter. Examples of two techniques for enhancing a converter's all-port MIMO admittance passivity, by active damping impedance emulation and multisampled pulse width modulation, are examined and shown to be effective. The proposed methodology is validated both in frequency and time domain, using control hardware-in-the-loop simulations, as well as experimentally, using a laboratory prototype.

All-Port MIMO Admittance Passivity for Robust Stability of DC–DC Interlinking Converters

Cvetanovic, Ruzica
;
Mattavelli, Paolo
Supervision
;
Buso, Simone
Supervision
2024

Abstract

This article explores the passivity properties of a dc–dc converter's unterminated all-port MIMO admittance matrix, for analyzing and preventing the converter's destabilizing impact in grid-connecting (interlinking) scenarios with an arbitrary, even meshed, termination (grid impedance). In addition to the passivity properties of the converter's unterminated input and output self admittances, the coupling passivity property is examined, which accounts for the possible destabilizing impact of port-coupling. The dependence of these properties on the control loop parameters is exemplified using a current-controlled buck converter. Examples of two techniques for enhancing a converter's all-port MIMO admittance passivity, by active damping impedance emulation and multisampled pulse width modulation, are examined and shown to be effective. The proposed methodology is validated both in frequency and time domain, using control hardware-in-the-loop simulations, as well as experimentally, using a laboratory prototype.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/3523738
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