This work presents a multichannel D-band receiver front-end for multiple-input-multiple-output frequency-modulated continuous-wave radar applications. The 120-GHz local oscillator (LO) signal is generated from an external 24-GHz source by an integrated frequency multiplier by five. We propose co-design of power-matched differential buffers with active splitters. Thank to the optimal impedance ratio, the power consumption of the LO distribution network could be minimized. To demonstrate the effectiveness of the discussed method, a chip with three receivers is implemented, where each receiver signal path comprises a mixer-first Gilbert cell which shows 12-dB conversion gain, 13-dB single-sideband (SSB) noise figure, and -5-dBm input-referred 1-dB compression point. A fourth channel is included for built-in self-test and the characterization of the LO distribution chain, providing a -2-dBm output signal over the 111-123-GHz frequency range. The circuit has a low-power consumption of 66-mW per RX channel, for a total power consumption of 198mW from the 1.8-V supply. The active area is 2.07mm2 implemented using a 0.13- {{mu }} ext{m} SiGe BiCMOS technology.
A Multichannel D-Band Radar Receiver with Optimized LO Distribution
Bilato A.
;Bevilacqua A.
2021
Abstract
This work presents a multichannel D-band receiver front-end for multiple-input-multiple-output frequency-modulated continuous-wave radar applications. The 120-GHz local oscillator (LO) signal is generated from an external 24-GHz source by an integrated frequency multiplier by five. We propose co-design of power-matched differential buffers with active splitters. Thank to the optimal impedance ratio, the power consumption of the LO distribution network could be minimized. To demonstrate the effectiveness of the discussed method, a chip with three receivers is implemented, where each receiver signal path comprises a mixer-first Gilbert cell which shows 12-dB conversion gain, 13-dB single-sideband (SSB) noise figure, and -5-dBm input-referred 1-dB compression point. A fourth channel is included for built-in self-test and the characterization of the LO distribution chain, providing a -2-dBm output signal over the 111-123-GHz frequency range. The circuit has a low-power consumption of 66-mW per RX channel, for a total power consumption of 198mW from the 1.8-V supply. The active area is 2.07mm2 implemented using a 0.13- {{mu }} ext{m} SiGe BiCMOS technology.
Pubblicazioni consigliate
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
