This article describes a sensorless stabilization technique for peak current mode control of three-level flying-capacitor (3LFC) buck converters. The technique eliminates the well-known instability associated with the flying-capacitor (FC) voltage runaway, leading to stable and balanced FC voltage. In the proposed technique, the FC voltage imbalance is detected by measuring the duty cycle mismatch DA - DB between two groups of switches of the 3LFC topology, an information already available to the controller without any additional sensing. The resulting compensation leads to a compact solution, which can be easily embedded into an analog or digital integrated controller. Two distinct approaches are developed in this article to implement the required correction on DA - DB, namely a sensorless peak offsetting modulation (POMOD) and a sensorless interleaving time modulation (IT-MOD). Operation, implementation challenges, and performances of both are investigated. The proposed solutions are verified through computer simulations and experimentally using a 16.5-to-3.3 V, 500 mA, 500 kHz 3LFC prototype.

Sensorless Stabilization Technique for Peak Current Mode-Controlled Three-Level Flying Capacitor Converters

Corradini, Luca;Mattavelli, Paolo;Bonanno, Giovanni;
2020

Abstract

This article describes a sensorless stabilization technique for peak current mode control of three-level flying-capacitor (3LFC) buck converters. The technique eliminates the well-known instability associated with the flying-capacitor (FC) voltage runaway, leading to stable and balanced FC voltage. In the proposed technique, the FC voltage imbalance is detected by measuring the duty cycle mismatch DA - DB between two groups of switches of the 3LFC topology, an information already available to the controller without any additional sensing. The resulting compensation leads to a compact solution, which can be easily embedded into an analog or digital integrated controller. Two distinct approaches are developed in this article to implement the required correction on DA - DB, namely a sensorless peak offsetting modulation (POMOD) and a sensorless interleaving time modulation (IT-MOD). Operation, implementation challenges, and performances of both are investigated. The proposed solutions are verified through computer simulations and experimentally using a 16.5-to-3.3 V, 500 mA, 500 kHz 3LFC prototype.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/3304973
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