We subjected all-organic complementary inverters to constant voltage stress. We found a 20% maximum variation of DC inverter parameters after a 104-s stress. The largest degradation was in the delay times, which increase up to a factor 7. This is due to the threshold voltage variation in pTFTs and the mobility reduction in nTFTs.

Effects of constant voltage stress on organic complementary logic inverters

WRACHIEN, NICOLA;CESTER, ANDREA;LAGO, NICOLO';MENEGHESSO, GAUDENZIO;
2014

Abstract

We subjected all-organic complementary inverters to constant voltage stress. We found a 20% maximum variation of DC inverter parameters after a 104-s stress. The largest degradation was in the delay times, which increase up to a factor 7. This is due to the threshold voltage variation in pTFTs and the mobility reduction in nTFTs.
2014
proc. of 44th European Solid State Device Research Conference (ESSDERC)
44th European Solid State Device Research Conference (ESSDERC)
9781479943784
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/3100108
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