Latch-up Analysis of Cmos Integrated-circuits For Automotive Applications

Custom CMOS ICs are very attractive for automotive applications; in the tough automotive environment, however, reliability hazards due to the 'latch-up' problem are greatly increased and a superior ability to avoid latch-up is therefore required. The purpose of this work is to discuss electrical measurements performed on custom CMOS ICs for automotive applications to verify their ability to avoid latch-up and to identify potentially dangerous technologies. Failure analysis of the structures which presented a high susceptibility to the phenomenon was performed by means of infrared microscopy and digital voltage contrast, which enabled latch-up sites to be located. Layout weaknesses were easily identified and eventual modifications were suggested to designers.