This paper presents a 2.2 GHz receiver front-end capable of an extreme current reuse, where the low-noise amplifier, the quadrature mixers and VCOs only draw 1.3 mA from a 1V supply. A careful time-variant analysis is carried out, resulting in a very accurate expression of the conversion gain and bandwidth of the downconverter. A prototype, implemented in a 90 nm CMOS technology, shows 27 dB gain over a 14 MHz bandwidth, with a noise figure of 13 dB. The input-referred 1 dB compression point is -23.7 dBm.

Accurate time-variant analysis of a current-reuse 2.2 GHz 1.3 mW CMOS front-end

CAMPONESCHI, MATTEO;BEVILACQUA, ANDREA;NEVIANI, ANDREA;
2010

Abstract

This paper presents a 2.2 GHz receiver front-end capable of an extreme current reuse, where the low-noise amplifier, the quadrature mixers and VCOs only draw 1.3 mA from a 1V supply. A careful time-variant analysis is carried out, resulting in a very accurate expression of the conversion gain and bandwidth of the downconverter. A prototype, implemented in a 90 nm CMOS technology, shows 27 dB gain over a 14 MHz bandwidth, with a noise figure of 13 dB. The input-referred 1 dB compression point is -23.7 dBm.
2010
Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS 2010)
ISCAS 2010
9781424453085
9781424453092
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/2445807
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