In VLSI technology, redundancy is a commonly adopted technique to provide reconfiguration capabilities to regular architectures. This paper proves upper and lower bounds on the number of minimal fault patterns (minimal set of faulty processors) which affect a link-redundant linear array in an unrepairable way, for both the cases of bidirectional and unidirectional links.
Counting the number of fault patterns in redundant VLSI arrays
PUCCI, GEPPINO
1994
Abstract
In VLSI technology, redundancy is a commonly adopted technique to provide reconfiguration capabilities to regular architectures. This paper proves upper and lower bounds on the number of minimal fault patterns (minimal set of faulty processors) which affect a link-redundant linear array in an unrepairable way, for both the cases of bidirectional and unidirectional links.
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