The paper presents a multi-mode analog-to-digital converter suited for wireless receivers that can handle GSM, UMTS and WLAN standards. The converter is based on a cascaded ΣΔ architecture, whose wide range of programmability of input frequency and dynamic range descends from modulator order programmability. The converter is fully integrated in a low-cost technology, i.e. a 0.35 μm standard CMOS. Extensive system and transistor level simulations prove a dynamic range of 94 dB, 79 dB and 68 dB in GSM, UMTS and WLAN modes respectively, while the worst case power consumption is 128 mW.
A multi-mode Sigma-Delta analog-to-digital converter for GSM, UMTS and WLAN
XOTTA, ANDREA GIOVANNI;GEROSA, ANDREA;NEVIANI, ANDREA
2005
Abstract
The paper presents a multi-mode analog-to-digital converter suited for wireless receivers that can handle GSM, UMTS and WLAN standards. The converter is based on a cascaded ΣΔ architecture, whose wide range of programmability of input frequency and dynamic range descends from modulator order programmability. The converter is fully integrated in a low-cost technology, i.e. a 0.35 μm standard CMOS. Extensive system and transistor level simulations prove a dynamic range of 94 dB, 79 dB and 68 dB in GSM, UMTS and WLAN modes respectively, while the worst case power consumption is 128 mW.
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