Plasma process induced damage has been widely investigated in the past few years. We present in this work results from a yearlong study intended to reduce plasma-induced damage in a modern CMOS technology, featuring ultra thin gate oxide. We studied both nMOSFETs and pMOSFETs with a physical gate oxide thickness of 3.5 nm.

P2ID in a Modern CMOS Technology

G. CELLERE;PACCAGNELLA, ALESSANDRO
2002

Abstract

Plasma process induced damage has been widely investigated in the past few years. We present in this work results from a yearlong study intended to reduce plasma-induced damage in a modern CMOS technology, featuring ultra thin gate oxide. We studied both nMOSFETs and pMOSFETs with a physical gate oxide thickness of 3.5 nm.
2002
7th International Symposium on Plasma- and Process-Induced Damage
VII INTERNATIONAL SYMPOSIUM ON PLASMA PROCESS INDUCED DAMAGE P2ID
0-9651577-7-6
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/1359986
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